We announced the new 24-port 10 GbE module for the Brocade MLXe routers at our Analyst and Technology Day last month, and I’m really excited about the 3X increase in 10 GbE density that is now available to our customers. This module brings the total 10 GbE density for the MLXe-32 up to an impressive 768 ports in a single chassis, and it also supports advanced MPLS and OpenFlow features for large-scale service provider supercore and data center core networks. It’s our first ASIC-based module for the MLXe routers, and we’re using our 4th generation silicon innovation called the MaxScale-160 to pack all the features and density onto the module. I had the opportunity to sit down with John Terry, one of our principal ASIC engineers, to learn some of the more interesting technical details about the ASIC and to get a tour of their hardware lab (alas, one of the few rooms on campus my badge won’t let me enter).
The MaxScale-160 ASIC was designed and tailored specifically for high-capacity core networks, with a total of 160 Gbps bidirectional capacity that integrates eight 10 GbE ports. A total of three ASICs are used on the module to support 24 10 GbE SFP+ ports. As always in next-generation hardware evolution, the module's density, performance, and cost were key factors in designing the ASIC. We developed the MaxScale-160 processor in order to increase port density without giving up features and to reduce the number of components on the board, which also lowered the overall cost per port. The ASIC integrates a total of 33 active components that include various packet processing and statistics FPGAs, ingress and egress ACL TCAM, packet lookup SRAM, and eight 10 GbE PHYs. You can really see the difference in the 8-port 10 GbE module (2010 era) and the 24-port 10 GbE module (2012 era). Each module also has a daughter board which has been removed for clarity in the picture below, the 8-port module is on the bottom and the 24-port modules is on top. The 24-port module has triple the number of ports as the 8-port module, but many fewer active components, which results in an overall higher MTBF and makes it easier to manufacture.
Altogether the 400 MHz MaxScale-160 ASIC uses 1.38 billion transistors, and is built on 45 nm process geometry. “Process geometry” means the smallest dimension that can be drawn into the silicon to define a transistor, which is the building block used to make logic gates. A total of 352 Mbits of embedded memory plus 29.6 Mbits of TCAM made the ASIC a challenge for our foundry vendor to manufacture, because it has some of the highest integrated TCAM content. The next version of the ASIC, called the MaxScale-400, will deliver 400 Gbps of bidirectional capacity, will have over 2 billion transistors and will use 32 nm process geometry.
The 24-port module is the most green and efficient module available for the MLX Series, because the MaxScale-160 has extremely low maximum power consumption of <45 W. We have been steadily lowering 10 GbE power consumption as we release higher density cards, and the 24-port SFP+ module uses an incredibly low 13.33 W/port. By comparison, the 8-port SFP+ module uses 30.75 W/port , the 4-port XFP module uses 56.25 W/port, and the first generation 2-port XFP module that we released in 2007 uses 75 W/port. This steady gain in power efficiency enables network operators to save on operational expenses in cooling and power, while also consolidating the number of devices in the network.
In case you missed it, I wrote about some of the router architecture challenges we’re solving in my blogs earlier this year. The MaxScale ASICs and our future generation silicon builds on these technology advances, and I can’t wait to see what our ASIC engineers will be able to do next to deliver even higher 10 GbE and 100 GbE density.
For more information on Brocade’s high density 10 GbE and 100 GbE solutions, please visit the Brocade MLX Series product page